Scott Rixner

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Scott Rixner is a Professor of Computer Science at Rice University. His research spans virtualization, operating systems, and computer architecture, with a specific focus on memory systems and networking. His work has led to 11 patents and has been implemented within several open source systems. He is also well versed in the internals of the Python programming language, as he has developed Python interpreters for both embedded systems and web browsers. He has been actively involved in curriculum development and oversight at Rice, having served on or led the curriculum committees for the University, School of Engineering, and Department of Computer Science. He is currently helping to lead the new MCS@Rice online degree program. Prior to joining Rice, he received his Ph.D. from MIT. 

Research Areas

Computer Architecture, Operating Systems, Virtualization, Memory Systems, Networking

Education

PhD in Electrical Engineering, MIT (2001)

MEng in Computer Science and Electrical Engineering, MIT (1995)

BSc in Computer Science, MIT (1995)

Teaching Areas

Introduction to Engineering Systems

Computational Thinking

Introduction to Computer Gaming

Algorithmic Thinking

Introduction to Program Design

Advanced Object-Oriented Programming

Introduction to Computer Systems

Network Systems Architecture

Advanced Microprocessor Architecture

System-level Virtualization

Advanced Topics - Computer Systems

Computer Architecture Seminar

Recent Patent Applications

Owl: A Python-based toolchain and runtime system for small embedded systems

System and Method for Managing Input/Output Data of Peripheral Devices

Method and System for Scalable Ethernet

System and Method for Context-independent Codes for Off-chip Interconnects

System and Method for Performing Efficient Conditional Vector Operations For Data Parallel Architectures Involving Both Input and Conditional Vector Values

System and Method for Re-ordering Memory References for Access to Memory

System and Method for Performing Compound Vector Operations

Apparatus for performing real time caching utilizing an execution quantization timer and an interrupt controller

Honors & Awards

2019: Rice University School of Engineering Curriculum Innovation Award

2014: Rice University Student Association Outstanding Mentor Award