Dr. Cavallaro joined the faculty of Rice University in 1988, where he is a Professor in the Department of Electrical and Computer Engineering and, by courtesy, in the Department of Computer Science. He is also Director of the Center for Multimedia Communications at Rice. Professor Cavallaro's research is in special-purpose VLSI processor architectures.
Advances in VLSI technology have made possible the implementation of special-purpose processors for signal processing, computer graphics, and robotics. Many of these applications involve a core group of matrix computations that can be efficiently performed on parallel arrays of functional units. In particular, important numerical algorithms for wireless communication systems can greatly benefit from enhanced parallel architectures and high-speed computer arithmetic. These algorithms and their efficient mapping to low-power architectures are studied on DSP, ASIC, and Application-specific Instruction Processors (ASIP).